The UniTESK approach to specification and functional validation of pipelined designs was presented on 5th IEEE East-West Design & Test Symposium (EWDTS 2007) which took place in Yerevan on September 8-10, 2007.
EWDTS is the annual symposium that is carried out beginning from 2003. The main target of the symposium is to exchange experiences in the field of design and test of electronics between the technologists and scientists from Eastern and Western Europe, as well as North America and other parts of the world.
Symposium is organized under the patronage of IEEE and TTTC. The main organizer is Kharkov National University of Radio Electronics. Among the sponsors of EWDTS there are leading vendors of electronics and CAD tools: Intel, Cadence, Synopsys, Mentor Graphics, and others.
In this year approximately 150 talks were given at the symposium; 24 of them were done by invited speakers from famous companies and universities. Researchers from more than 20 countries around the world, including USA, Germany, Brazil, Russia, Ukraine, and others, participated in the conference.
We made a presentation “Testbench Automation of Pipelined Designs Based on Contract Specifications” dedicated to test development automation for pipelined designs basing on contract specifications in terms of preconditions and postconditions of operation stages.
The presented approach is being developed at UniTESK Lab. By now it has been successfully applied to different microprocessor modules (TLB, FPU, ALU, and others). The usage of the approach allows to automate testbench development for RTL models of hardware and to increase the quality of validation.
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